83 research outputs found

    A Layout-Aware Circuit Sizing Model Using Parametric Analysis

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    We propose a circuit sizing model that takes layout parasitics into account. The circuit and layout parameters are stored in a parameterized layout description format, GBLD. The layout parasitics are stored as closed form expressions. Layout optimization tools can modify the layout and recalculate parasitics on the fly. If the results of sensitivity analysis are passed to those tools, optimization for performance can be achieved with relatively few iterations involving time consuming circuit simulations

    GBLD: A Formal Model for Layout Description and Generation

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    In this paper, we introduce a layout description and generation model, GBLD, based on the notions and elements of L-systems and context-free grammars. Our layout model is compatible with geometric layout formats, such as GDSII or CIF. However, it is more powerful and more concise. The layouts represented by GBLD are sizeable, parameterised, and can incorporate design rules. GBLD has the potential to be used as a format for analog layout templates, analog layout retargeting, as well as the final layout format

    Tag anti-collision algorithms in RFID systems - a new trend

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    RFID is a wireless communication technology that provides automatic identification or tracking and data collection from any tagged object. Due to the shared communication channel between the reader and the tags during the identification process in RFID systems, many tags may communicate with the reader at the same time, which causes collisions. The problem of tag collision has to be addressed to have fast multiple tag identification process. There are two main approaches to the tag collision problem: ALOHA based algorithms and tree based algorithms. Although these methods reduce the collision and solve the problem to some extent, they are not fast and efficient enough in real applications. A new trend emerged recently which takes the advantages of both ALOHA and tree based approaches. This paper describes the process and performance of the tag anti-collision algorithms of the tree-ALOHA trend

    Location based services with personal area network for community and tourism applications

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    The Infopoint Explorer is an outdoor wireless personal area network for location-based services that allows users to access locality information interactively using mobile computing devices such as PDAs and smartphones. The Infopoint explorer was used to study the limitations imposed by inexpensive and popular wireless technologies such as Bluetooth for outdoor location-based services. The Infopoint Explorer functioned as a multimedia guidebook that allowed access to location-specific information using wireless Infopoints. The Infopoints detect and attempt to transfer multimedia content to nearby mobile computing devices using Bluetooth connectivity. An adaptive Bluetooth Inquiry Access Code algorithm was developed to reduce the time taken for the Infopoint to detect nearby devices. The Infopoint was deployed for a four-month trial

    A dynamic computation method for fast and accurate performance evaluation of multi-core architectures

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    Early estimation of performance has become necessary to facilitate design of complex multi-core architectures. Performance evaluation based on extensive simulations is time consuming and needs to be improved to allow exploration of different architectures in acceptable time. In this paper, we propose a method that improves the tradeoff between simulation speed and accuracy in performance models of architectures. This method computes during model execution some of the synchronization instants involved in architecture evolution. It allows grouping and abstracting architecture processes and this way significantly reduces the number of simulation events. Experiments show significant benefits from the computation method on the simulation time. Especially, a simulation speed-up by a factor of 4 is achieved in the considered case study, with no loss of accuracy about estimation of processing resource usage. The proposed method has potential to support automatic generation of efficient architecture models

    A bluetooth wireless network infrastructure for multimedia guidebooks on mobile computing devices

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    This paper describes the implementation of a Bluetooth Village Guide Book (VGB) scenario for use in the Kelvin Grove Urban Village located in Brisbane, Australia. An Information Point Station Network (IPSN) was developed, along with software for two types of mobile computing devices. The implementation consists of several Information Point Stations (IPSs) placed at locations of significance, with access to information items on a centralized server. Once registered, the user is given the opportunity to experience context-aware information on demand and in various multimedia formats. These information items are selected by the user, either by way of a menu system appearing on their mobile computing device or a more intuitive pointer-tag system. Information items are then ‘beamed’ via Bluetooth to the user’s mobile computing device for the user to view The implementation was found to be successful and was tested with multiple users accessing information items from a given IPS as well as multiple IPSs attached to the centralized server. Still, there is further work to be done on the VBG software, the user registration system and on creating an embedded solution for the individual Information Point Stations

    Symbolic analysis of tau cell log-domain filter using affine MOSFET models

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    This paper analyses a filter known as the Tau Cell using symbolic methods and shows that the operation of this filter is independent of the magnitude of the input DC offset. This means that the circuit places no restrictions on whether the input DC offset is a sub-threshold current or not. The circuit behaviour predicted from symbolic analysis was observed in similar circuits on a chip fabricated using MOSIS AMI 1.6μm technology. This paper highlights the utility of symbolic analysis and shows that it is a powerful tool for circuit analysis and design

    Towards Reduced-Order Models for Online Motion Planning and Control of UAVs in the Presence of Wind

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    Abstract This paper describes a model reduction strategy for obtaining a computationally efficient prediction of a fixed-wing UAV performing waypoint navigation under steady wind conditions. The strategy relies on the off-line generation of time parametrized trajectory libraries for a set of flight conditions and reduced order basis functions functions for determining intermediate locations. It is assumed that the UAV has independent bounded control over the airspeed and altitude, and consider a 2D slice of the operating environment. We found that the reduced-order model finds intermediate positions within 10% and at speeds of 10x faster than clock-time (even in wind conditions in excess of 50% of the UAV's forward airspeed) when compared against simulation results using a medium-fidelity flight dynamics model. The potential of this strategy for online planning operations is highlighted

    Design of an Integrated Electronic Speed Controller for Compact Robotic Vehicles

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    Abstract Adopting a system-on-chip approach, this paper presents an integrated FPGA-based Electronic Speed Control (ESC) for driving brushless DC electric motors. This allows for sensing, computation, and higher control bandwidth than traditional off-the-shelf ESCs (typically 50Hz). In addition to a more compact and flexible package, this provides greater system awareness and facilitates a faster control loop rate, which are useful for agile robotic systems, such as UAVs. This design has been tested in conjunction with a custom, compact quadrotor system. It provides reduced payload and increased robustness compared to traditional controllers
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